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Fault-tolerant networks-on-chip routing with coarse and fine-grained look-ahead

Liu, J; Harkin, J; Li, Y; Maguire, L

Authors

J Liu

J Harkin

Y Li

L Maguire



Abstract

Fault tolerance and adaptive capabilities are challenges for modern Networks-on-Chip (NoC) due to the increase in physical defects in advanced manufacturing processes. Two novel adaptive routing algorithms, namely coarse and fine-grained look-ahead algorithms, are proposed in this paper to enhance 2D mesh/torus NoC system fault-tolerant capabilities. These strategies use fault-flag codes from neighbouring nodes to obtain the status or conditions of real-time traffic in a NoC region; then calculate the path weights and choose the route to forward packets. This approach enables the router to minimise congestion for the adjacent connected channels and also to bypass a path with faulty channels by looking ahead at distant neighbouring router paths. The novelty of the proposed routing algorithms is the weighted path selection strategies, which make near-optimal routing decisions to maintain the NoC system performance under high fault rates. Results show that the proposed routing algorithms can achieve performance improvement compared to other state of the art works under various traffic loads and high fault rates. The routing algorithm with fine-grained look-ahead capability achieves a higher throughput compared with the coarse-grained approach under complex fault patterns. The hardware area/power overheads of both routing approaches are relatively low which does not prohibit scalability for large scale NoC implementations.

Citation

Liu, J., Harkin, J., Li, Y., & Maguire, L. (2016). Fault-tolerant networks-on-chip routing with coarse and fine-grained look-ahead. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 35(2), 260-273. https://doi.org/10.1109/TCAD.2015.2459050

Journal Article Type Article
Acceptance Date Jul 10, 2015
Online Publication Date Jul 22, 2015
Publication Date Feb 1, 2016
Deposit Date Jul 27, 2015
Journal IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Print ISSN 0278-0070
Publisher Institute of Electrical and Electronics Engineers
Peer Reviewed Peer Reviewed
Volume 35
Issue 2
Pages 260-273
DOI https://doi.org/10.1109/TCAD.2015.2459050
Publisher URL http://dx.doi.org/10.1109/TCAD.2015.2459050
Related Public URLs http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43


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